Figure 4: Block Diagram For Supply Section
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Considering the decisions reached in the feasibility report written this fall for the project, the team set the following six criteria for the supply portion of the design.
Working with the above criteria several different options were investigated.
Using a pre-built supply contradicted the concept of a senior design project. The team therefore settled on option C from the above list.
Below in Figure 4 is an overall functional block diagram for the supply
section. Both the fixed and variable supplies along with the interface to the
microprocessor are shown.
Figure 4: Block Diagram For Supply Section
Four distinct sections are represented in Figure 4: AC to DC converter, fixed supplies, variable supplies, and microprocessor supplies. Each section will be discussed in more detail in later sections. The microprocessor supply also delivers power to the control and logic sections for each sub-module. This allows the individual supplies to be monitored by the microprocessor even when they are shut down due to error conditions. This situation might occur, for instance, if the relay that applies power to the power supply sections fails.
One of the basic concerns in the design was finding the best method to convert the incoming 115V AC to the supply, to a usable DC value for all the individual supplies. When 115V AC at 60 Hz is rectified by a full-wave bridge, the resulting DC value of 160V is too large to be applied to most regulator circuits. Most regulators have a Vout to Vin maximum of 40V. This would result in having to take several steps to reduce the 160V to a voltage that could be used in the supply regulators. Equation 1 shows the need of three steps in the reduction process. There are two alternative methods to accomplish the AC to DC conversion - transformers and switching regulators with high frequency transformers.
Equation 1: Voltage Reduction Steps
160 - n * 40 = 40
n = 3
The use of an input transformer to reduce the 115VAC to 40VAC or lower is one of the options in the AC to DC converter. Individual transformers or multiple tap transformers could be used, or a combination of the two. Use of multiple tap transformers would reduce the volume of the iron and therefore the weight of this section. Individual transformers allow for more freedom choosing transformers and reduce the interdependency of the supplies. There are two major drawbacks to using transformers. One is their bulk and weight, and the second is their low efficiency.
The second alternative is to use a switching supply and a high frequency
transformer to replace the inductor normally used in the design. Figure 5 shows a
schematic of a flyback switching supply that was copied from application note AN556 (see Appendix H) from National Semiconductor. This circuit could
be modified by using a multiple-tap high frequency transformer to replace the single
secondary transformer shown; this would allow the transformer to develop the required DC
levels that are needed by each of the individual supply and regulator circuits. The
original controlled Vo would have to be within the switcher's operating
specifications for Vin-Vout, but the other taps could be at the
appropriate levels. Calculations and design for this transformer and the purchase of it
would make this an impractical solution for the AC to DC converter, but it may be
practical with larger quantities. Since the design of the overall supply is of a modular
nature, the a change to a switcher could be accomplished at a later date if the unit was
to go into full production. One other drawback of using a switcher is the noise generated
from the high frequency oscillator used in the chopping circuit. This noise could
interfere with the regulators and control circuits used on the individual supplies.
Figure 5: Schematic of Flyback Switching Supply From National Semiconductor AN556
The transformer design for the AC to DC converter is the best choice for this level of the design project due to cost time and availability of parts.
This section of the supply develops the needed DC levels that are used for each of the individual supplies. Each output is shown along with fuse protection to prevent damage to the transformers. The schematic for both the transformers and rectifying section used in all of the individual supplies is shown in Appendix K.
This section develops 50V DC, 20V DC, +5V DC, and 15V DC for use by the different modules in the supply. Each output voltage is created from an isolated tap of a transformer to ensure good isolation and current capability. The +/-50V DC lines are used for the +/-35V DC module, and the +/-20V DC lines are used for the +/-15V DC and +5V DC modules. The +/-15V DC and the +5V DC are used only for the processor and internal circuitry, specifically the +/-12V DC and +5V DC regulators respectively.
The primary windings of the +/-50V DC and +/-20V DC outputs are fed by 120V AC that is connected through the normally open contacts of a solid state relay. This relay is controlled by the processor to turn on or off the supplies, and is controlled by the processor's error handling routine. This relay will be covered in greater detail in the COP section. The 120V AC supplying the primary windings for the microprocessor circuits is not connected through the relay, so the microprocessor has power at all times. All the 120V AC lines are passed through a single main power switch not shown in Appendix K.
The output windings of the transformers are connected through individual bridge rectifiers for several reasons:
After the rectification, the DC signal is sent through two parallel 1 000mF capacitors. This provides for 1 000mF of capacitance per ampere for ripple elimination as well as current surge demands. An additional 0.1mF capacitor is used after the larger capacitors in order to absorb higher frequency noise. At this point, the voltages are ready to drive the individual modules.
Each of the individual supplies requires that the output voltage and current delivered to the load are monitored and feedback to the microprocessor for display and adjustment routines for the variable supplies. Each supply also has to have a unique address. The processor needs to know which supply is responding to a query and the supplies need to identify to which module commands are being sent.
The same basic circuit is used on each of the supplies to measure the voltage, current, and to select the correct address. The schematic for each of the subsystems needed to perform the above actions in located in Appendix K.
A three-bit decoder decodes the address. This comprises selecting either non-inverted or inverted address bits and NANDing the results. Since the three bits are from a normal processor port and not the memory address bus, the bits will maintain their state as long as the program requires. The B/S (board select) signal that is decoded is used in several other subsections of each supply. The three bits are jumper selectable to allow the address for each board to be changed as the need arises.
The latch signal from the processor is used to latch the current data word into a data latch. The data word comes from the processor on 10 other port lines. By latching this data the particular module is ensured of always having the last correct input word that was addressed to it.
The heart of the measurement system is the National Semiconductor ADC10462 (see Appendix I for data sheet). This chip is a two-port, ten-bit analog to digital converter (ADC). The two ports will be selectable by the processor to measure either the current or the voltage of the supply. The ADC chip requires that a clock signal be used to start the conversion and then to latch the digital word. This clock signal will be developed from the clock subsection of each board. The voltage being measured is pre-scaled by an operational amplifier since the input to the ADC has to be in the range of 0 to 5V.
For the current measurement, the processor will select the second port which is connected to the output from a Maxim MAX471, a precision high side current sensing amplifier (see Appendix J for data sheet). This Maxim chip is placed in series with the output, and monitors the current through it, by taking the differential voltage across an internal 0.1m resistor. The current range for the chip is from 0A to 3A, which corresponds to a 0V to 5V output signal. This output is fed to the ADC chip for encoding for the processor.
The feedback to the processor comes from the output word of the ADC. This word is put on the data bus through a set of tri-state buffers which are only selected while the board address is decoded and the ADC has completed the conversion. The processor is responsible to know whether the word is a voltage or current based on the selection I/V bit that was used.
The fixed supplies comprise of a 78xx or 79xx regulator and the selection and measurement circuits described above. The voltages that are developed include +5V DC at 2A and 15V DC at 2A. The 78xx chip is for a positive regulator and the 79xx is for a negative regulator. The typical regulator sections with interfaces are shown in the schematic of Appendix K.
Appendix K contains a complete set of schematics; this includes all the fixed voltage supplies. Although there will be no feedback to any of these modules as in the variable modules, the current and voltage samples are still needed for the display and as a precaution against regulator thermal shutdown or overcurrent shutdown.
These supplies are not monitored by the processor and are not under control of the error handling routines of the processor. The voltage outputs are present at any time after the power switch is turned on. This enables the control and measurement circuits to function even after the processor has determined that an error has occurred and to shut off the fixed and variable supplies. These supplies develop +5V DC at 2A, 15V DC at 1A and 12V DC at 1A and have multiple sources for the +5V DC with separate filtering for each section.
The heart of the supply section is the variable supplies. These are capable of delivering 2A from 0 to 35V DC in 0.05V increments. The National Semiconductor LM138 is the positive regulator and the LM137 is the negative regulator. Data sheets for both are in Appendix L. Both regulators work on the same principle. There is a 120W resistor connected from the output to the adjustment pin. The chip impresses a 1.2V reference across the 120W resistor which develops 10mA through this resistor and the voltage set resistor connected from the adjustment pin to ground (see schematic in Appendix L). The value of the voltage set resistor to ground determines the voltage at the adjustment pin. The chip maintains the 1.2V DC across the 120W resistor thereby setting the output voltage to a value of 1.2V above the adjustment pin. Appendix K contains the schematic for the regulator and adjustment circuit implemented based on the method discussed above.
The adjustment of the voltage set resistor is done by latching the digital output word for the supply and decoding the word to select the correct values of resistance to add in series from the adjustment pin to a negative 1.2V reference. The negative 1.2V reference is needed since setting the resistor at 0W would cause the output voltage to be 1.2V otherwise. In order to get a 0V output the adjustment pin has to be set to negative 1.2V instead of to ground. The resistances are selected or deselected by FETs tied across them and stacked up from the adjustment pin to the negative 1.2V reference.
When a digital word is latched onto the board each bit is feed through an optical isolator to both isolate the processor from the higher voltages and to convert the control signal from a TTL level to a 0V or 40V signal. This signal is applied to the gate of the FET and either turns it on, bypassing the resistor, or turns it off, allowing the resistor to be used in the series connection from the adjustment pin to ground. Equation 2 is used to select the correct value for the voltage adjustment resistor for a particular voltage.
Equation 2: Digitally Controlled Output Voltage
Iadj is set to 50mA and is held constant by the regulator and Vref is the 1.2V across the 120W resistor. The values of the 10 resistors used are picked such that the total series combination is the correct value for a 35V output and each resistor is one half of the previous value. The values specified on the schematic would have to be precision custom values; for the prototype the values will be obtained by using 25-turn trimming variable resistors. Even if the values are not exact, the digital feedback will compensate for any error by re-selecting a combination to get the desired output voltage. For production units these resistors would be purchased as a SIP trimmed to the correct values.
When adjusting the supply to 0V, all of the FETs are in an on state thereby connecting the adjustment pin to the -1.2V DC reference. A problem arises since each of the FETs has a small on resistance, and there are 10 FETs connected in series. Because of this, the adjustment pin is not connected directly to the -1.2V DC reference, but is instead connected through 10 times the on resistance of a single FET. The on resistance of the FETs being used is specified as a maximum value of 3W. Calculating the output voltage using this maximum value multiplied by 10 and using Equation 2, one would arrive at an output voltage of 0.3V DC instead of 0V as expected.
To overcome this undesired effect, there is a FET connected directly from the adjustment pin to ground. Any time that the control word for 0V is detected, this FET is turned on. This places the on resistance of the 10 FETs in parallel with the on resistance of the one FET, which results in a net on resistance of less than 2.7W. A resistance of 2.7W will result in an output voltage of less than 0.02V DC.
To detect the control word for zero, there is an eight input AND array that receives data bits 0 to 7. The output of this AND array is one of the inputs to another three-bit AND along with the last two data bits, 8 and 9. The result of this final AND is used to control the single bypass FET through an optical isolator.
The negative 1.2 V DC reference used in the adjustment is developed by using a precision voltage reference diode as a simple Zener regulator as shown in the schematic in Appendix K.
The negative supply would use the LM137 as the regulator and the FETs would be changed to p-channel devices in order to handle the negative voltages across the resistors.
Both the positive and negative supplies would have filtering on their output to reduce any noise or ripple that may be present. In all regulators these filter caps would be placed as close to the regulator as possible to improve performance and regulation of the output. The diodes used on the regulators are for protection in case of a short on the input side of the regulator. This condition could cause the output voltage to exceed the input voltage due to charge buildup on the filter capacitors, damaging the regulator output drivers. The diode would shunt the voltage around the regulator to ground, protecting the regulator.