edurant.com > MSOE > SEED > Design > Contents > Simulation and Laboratory Testing

[previous: Design of Control Blocks] [next: Implementation]


Simulation and Laboratory Testing

The analysis of the variable portion of the supply is of the most concern. Spice simulation was done on several different variations of the control circuit. The original design did not use the FETs as shown in the variable regulator schematic in Appendix K. Instead it used a D/A converter feeding an Op amp that was connected to the adjustment pin. Spice simulation showed that this design, though simple, worked great. It was capable of 0-35V DC output and had few components. The next step involved prototyping the design in the lab and testing across the full range of required outputs.

As shown in Figure 9, the response of the regulator when the adjustment pin is below 7.0V is not as predicted by the solid line representing the Spice simulation results. Since the data sheet for the regulator showed the use of a variable resistor from the adjustment pin to ground, the design evolved into the current schematic. Compairson of Set v. Output
Figure 9: Comparison Of Set Voltage And Output Voltages As Measured At IC And Load

To simulate the response of the new design, a digital input signal table was created that represents all combinations of the ten bit data word. Spice would not simulate all the combinations without generating a time step interval error. This error is a calculation error in the simulation and not a function of the circuit. To work around the error, the circuit was simulated over 85 sequential combinations at one time. Then the sequence was offset by 85, and repeated until all combinations were checked. A sample of the results are shown in Figure 10.

Digital Simulation
Figure 10: Digital Simulation

The results of this simulation were verified by prototyping the simple regulator shown in Appendix K. The results show a linear response of the output voltage as a function of the variable resistor. This can be seen in Figure 11. The results obtainable in the final design will not be as smooth as these results due to the discrete steps in value that the variable resistor will be set to. The design will allow for 50mV steps with the ten bit data word.

Simulations of the current and voltage measurements section of the supplies was not able to be performed due to the lack of Spice models for key components. Testing of these sub-circuits will take place next quarter as the parts are received from vendors. Output Compairson
Figure 11: Comparison of R2 v. LM338 Output